Function core::arch::mips64::__msa_bclr_w

pub unsafe fn __msa_bclr_w(a: v4u32, b: v4u32) -> v4u32

🔬 This is a nightly-only experimental API. (stdsimd #48556)

This is supported on MIPS-64 and target feature msa only.

Vector Bit Clear

Clear (set to 0) one bit in each element of vector a (four unsigned 32-bit integer numbers). The bit position is given by the elements in b (four unsigned 32-bit integer numbers) modulo the size of the element in bits. The result is written to vector (four unsigned 32-bit integer numbers).